PCIeV4BASE is a PCI Express card with Xilinx™ Virtex-4™ FPGA,
512 MB SO-DIMM memory and a 78-pin HD-SUB connector.
A slot between the FPGA and the HD-SUB connector allows to integrate additional electronic components (PIB plug-in board). Enhancements such as ADC, DAC or PHY's can be added this way.
A standard PIB (PIB64IO) which provides 64 I/O signals (5 volt tolerant) comes with the board.
The FPGA is connected to a DDR2 SO-DIMM socket. As per default it is populated with a 512 MByte module.
The PCIe interface of the card is driven by an external controller, the PLX PEX8311 PCIe bridge. It provides a bus mastering PCIe interface, there is no need to use PCI-Express IP cores in the FPGA design. The details of the PCIe bus need not be known to the developer.
The supplied sample code shows how easy the communication between the FPGA (Wishbone bus) and the PC can be established.
The achievable data rates are close to the theoretical maximum.
Configuration of the FPGA is done using the PCIe interface.
The necessary software is included in source code and as executable.
Technical data:
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FPGA family
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VIRTEX-4™ |
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FPGA
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XC4VLX25-10FFG668C
others (i.e. XC4VLX60-12FFG668C) on request. |
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Configuration options
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via PCIe interface (software included)
via JTAG using the Xilinx download cable (not included) |
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User I/O
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The SUB-D connector provides 64 signals when using the standard plug-in-board 'PIB64IO'.
Organization: 8 banks x 8 bits. |
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Memory
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512 MByte DDR2-SDRAM SO-DIMM
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Interfaces
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PCIe x1
JTAG header for Xilinx download-cable (not included) |
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Supported OS
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The included software UDK (Unified Development Kit) is usable with Windows™ XP/VISTA/7/8 and Linux™. |
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Dimensions
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according to PCI specifications 'short card' |
www.cesys.com/products/pciev4base/
We'll inform you if the price of this product will be changed according to your price alert.
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